1. Field of the Invention
The present invention relates to a thin film transistor array substrate and a method of manufacturing the same, and more particularly, to a thin film transistor array substrate capable of improving reliability and a method of manufacturing the same.
2. Discussion of the Related Art
In recent years, the field of displays that visually express electric information signals has been rapidly developed with the advent of the information age. Correspondingly, a variety of flat display devices having excellent performance, such as slim design, light weight, and low power consumption, have been developed.
Examples of flat display devices may include liquid crystal display (LCD) devices, plasma display panels (PDPs), field emission display (FED) devices, electro luminescent display (ELD) devices, electro-wetting display (EWD) devices, and organic light emitting display (OLED) device. Such flat display devices essentially include a flat display panel for realizing an image. The flat display panel is configured such that a pair of substrates opposite to each other is bonded to each other while interposing a light emitting material or a polarizing material therebetween.
Generally, flat display devices of an active matrix driving mode include a thin film transistor array substrate to independently operate each of a plurality of pixel regions.
A thin film transistor array substrate includes a plurality of switch devices selectively turned on and off and formed to correspond to a plurality of pixel regions, a plurality of pixel electrodes formed to correspond to the plurality of pixel regions and connected to the plurality of switch devices, and a common electrode formed to correspond to the plurality of pixel regions. Here, each pixel region is independently driven. The thin film transistor array substrate may further include an interlayer insulating layer interposed between the pixel electrode and the common electrode to insulate the pixel electrode and the common electrode from each other.
Here, when the pixel electrode and the interlayer insulating layer are formed, the same mask may be used to simplify an exposure process using a mask. That is, a pixel electrode material layer and an insulating material layer are sequentially stacked. Then, a masking layer having an opening corresponding to each pixel region is disposed on the insulating material layer, and the insulating material layer is patterned using the masking layer to form the interlayer insulating layer. Then, while maintaining the masking layer on the interlayer insulating layer, the pixel electrode material layer is patterned to form the pixel electrode.
In this regard, the pixel electrode material layer is patterned by wet etching. According to this process, an undercut region is formed due to etch bias under the edge of the interlayer insulating layer exposed by wet etching with the pixel electrode material layer through the opening of the masking layer.
The undercut region may cause disconnection between the common electrode and the common line during formation of the common electrode.
In addition, since only the top surface of the pixel electrode is covered with the interlayer insulating layer, and the side of the pixel electrode is not covered with the interlayer insulating layer, the side of the pixel electrode may be connected to the common electrode during formation of the common electrode on the interlayer insulating layer, thereby causing short circuit.
Thus, reliability of the thin film transistor array substrate may be reduced.